In a typical semiconductor fabrication process, completed integrated circuit dice fabricated on wafers (for example, wafer 101 of FIG. 1) are subjected to an electrical testing (e.g., wafer probe or wafer sort) step prior to die singulation (i.e., dicing) and device packaging. The wafer probe will electrically test either a small sample of dice on a wafer or test each die separately by an electrical probe.
During the electrical probe, the wafer 101 is carefully mounted onto a movable plate (not shown) with at least three degrees of freedom (usually x-, y-, and z-axis movements). An electrical connection is made via a “probe card” (also not shown) which is a custom built circuit board designed to match a geometry of bonding pads on each die and connect the die to one or more pieces of test equipment. After making electrical contact between the probe card and the die, test programs are run to determine a pass/fail status of each tested die. If a die fails wafer probe, it is typically marked with an ink dot in the center of the die and the wafer 101 is moved into position for testing the next die. At assembly, an inked bad die 105 is discarded and a non-inked good die 103 is prepared for final packaging.
The non-inked die 103 which passed wafer probe could, however, due to its proximity to the inked bad die 105, fail prematurely in the field. Therefore, it is desirable to have a method to anticipate which dice may have a high probability for failure.